The IEEE International Conference on Microelectronics (ICM) has been held in numerous countries
across the Southern Europe and Western and Southern Asia for the past 28 years. The 29th edition
of the conference will be hosted by Arts, Sciences & Technology University in Lebanon (AUL) at the Crowne Plaza Hotel, Hamra, Beirut
in December 2017. In ICM 2017, several topics will be discussed such as Circuits and Systems,
CAD Tools and Design and Micro/Nano electronics and special topics.
It will include oral, poster sessions and tutorials given by experts in state-of-the-art topics. The regular technical program will run for three days. Moreover tutorial sessions will be held on the first day of the conference. Perspective authors are invited to upload full papers using the ICM2017 Electronic Submission Portal below. Regular papers should be prepared with the official IEEE paper template of no more than 4 pages including results, figures and references: Paper Template.
Accepted papers will be published in the electronic conference proceedings in IEEE XPLORE.
You are invited to upload full papers using the ICM2017 Electronic Submission Portal below. Regular papers should be prepared with the official IEEE paper template of no more than 4 pages including results, figures and references: Paper Template. Your submission should contain sufficient detail to allow for critical review. All submissions will be evaluated by at least two reviewers.
Papers are solicited in, but not limited to, the following topics:
The LTE-Advanced network has reached its maturity, with no major evolution scheduled in the next years. By 2020, the fifth generation of mobile communications (5G) will have to propose a new technical solution to overcome the frequency bandwidth limitations to address the huge rising of the data rate. The 5G standard will be the key element of the future high-connectivity society where the data rise must be accompanied by a high-reliability communication link and a drastic reduction of the system power consumption. In the radiofrequency front-end (RFFE) of the mobile phone, the power amplifier (PA) is one of the main hungry circuit in terms of power-consumption. The 5G PA will be multi-band and multi-mode with high performances (efficiency, output power, linearity) and low cost (CMOS technologies). One of the most promising technologies to address these requirements is the 28nm-CMOS FD SOI using the backgate of the transistors to achieve a high gain mode or a high linearity mode for the PA, changing in real time current and voltage biases and thus improving its power consumption with a large power back-off (OFDM requirement). This keynote presents some recent CMOS SOI power amplifier achievements, where the new self-healing and self-contained paradigms reduce the voltage and current precautionary margins in the RF transistor and thus improve the PA performances for 5 G mobile communications.
Eric Kerhervé received the Ph.D. degree in Electrical Engineering from Bordeaux University, France in 1994. He is Professor in Microelectronics and Microwave applications in Polytechnic Institute of Bordeaux, director of the STMicroelectronics/IMS joint Lab and deputy director of IMS laboratory in Bordeaux. His research activities focus on the design of RF and millimeter-wave power amplifiers in Silicon and GaN technologies. He is or was involved in many European and French projects to design silicon RF/mmW power amplifiers for mobile communications. He has authored or co-authored more than 200 technical papers in this field, and was awarded 24 patents. He has organized 8 RFIC/MTT workshops on advanced silicon technologies for radiofrequency and millimeter-wave applications. He was the co-chair of IEEE ICECS'2006, IEEE NEWCAS'2011 and chair of EuMIC'2015 and JNM’2015. He is member of the Executive Committee of SiRF and member of the IEEE MTT-7 Microwave and Millimeter-Wave Solid State Devices committee. He was 2-years associate editor of IEEE Transactions on Circuits and Systems II.
With today manufacturing technology, it is not possible to eliminate all defects and ensure every manufactured unit is perfect. Instead, each manufactured unit must be tested so that defective parts are not shipped to a customer. Different Test Strategies are commonly used since none is considered as optimal in terms of low defect level. Most companies use some but not all of the following three Test Strategies: The Static Voltage strategy, the Dynamic Voltage or Delay strategy, the Static or Dynamic Current (IDDX) strategy. While using different approaches, these different test strategies have a common objective: reveal the presence in the chip of defects or deviations that may create a dysfunction. However, defect behavior depends on the technology and they have been evolving through the successive technological nodes. The objective of this presentation is to give an historical perspective of the defect and fault modeling domain showing how the models used for test generation and fault simulation have been evolving through the different generations. This presentation focuses on spot defects that manifest themselves as shorts or opens in the interconnect or in the MOS transistors, and the demonstration is illustrated through one example of defect.
Michel Renovell received his Ph.D. degree in applied physics in April 1986 from the University of Montpellier, France. He joined the Laboratory of Computer Science, Automation and Microelectronics of Montpellier (LIRMM) in September1986 as a permanent researcher founded by the CNRS (National Council for Scientific Research). He served as Head of the Microelectronics team from 2000 to 2005 and has been Deputy-Director of LIRMM from 2009 to 2016. He is now Scientific Delegate for the National Institute of Computer Science (INS2I) at the National Headquarters of the CNRS managing more than 50 French labs. He is author of more than 220 papers and he is member of the editorial board of JETTA, IEEE Design & Test, and the VLSI Journal. He received several Best Paper Awards and has been General Chair or Program Chair of many conferences (ETS, VTS, DDECS, IMSTW, DELTA, FPL, SBCCI, DCIS, DTIS, EWD&TS…). He is IEEE Fellow for his contribution to defect based testing.
Microelectronics CMOS VLSI Hardware Implementation is a main goal of creating small area and low power systems for solving problems; such as pattern recognition, sensors, etc …. Normally the goal is the production of integrated circuit chip, which is a basic step required for creating electronic systems. Solving real problems need from scientists and reserachers to find and search the best solution. Usually, they think to find the best algorithms that solve the problem then they test these algorithms by doing software implementation in one of many languages like C. Also there is the hardware solution which is based on converting the software solution by making electronic systems that receive input and produce output. ASIC chip that implements these algorithms is the Hardware Implementation and more precisely CMOS VLSI Hardware Implementation. In Hardware Implementation, you have to choose between analog or digital implementation or both together and this depends on your needs for application and what is the best solution for that. Over the previous years, Silicon CMOS VLSI technology has become the main fabrication process for reasonably high performance and cost effective circuits. The nature of these growths is understood by the rapid growth of the number of transistors on a single chip.
In this tutorial we are providing concept of MOS integrated circuits and the following points will explained in details:
- The basic operations, equations and functions that compose the algorithm to be implemented in CMOS VLSI Hardware.
- Finding and searching the best analog electronic circuit that implements the operations, equations and functions.
- Creating a schematic “by Cadence”, doing simulation by Hspice or Spectre Simulator.
- Creating a model and use it again in the software implementation programs to be sure that the results are still accepted.
- Designing the layout, and do again the simulation and be sure if the results are still accepted.
- Chip Preparation to be submitted for fabrication.
- Measurements and getting final results.
Hussein Chible was born in Tyr (Lebanon), in 1969. He received the degree in electrical engineering (five years), section Communication and Electronics Engineering, from the Beiurt Arab University, Beirut, Lebanon, in 1992, and the Ph.D. degree from the University of Genoa, Italy, in 1997 in Electronic and Computer Engineering. He then joined Lebanese University, Beirut, Lebanon, where he is currently a Full Professor. His scientific interests focus on the design of analog CMOS VLSI circuits and systems, analog signal processing, designing full custom IC. Actually, he works on designing of tactile sensors systems.
This tutorial has been prepared for the students who want to know about the Hardware Implementation and specially the using of CMOS VLSI Technology and want to design a full custom chip.
Participating students must already aware of the basic concepts of analog electronics circuits.
Internet of Things (IoT) is the network of physical objects or “things” embedded with electronics, software, sensors, and network connectively. It enables the objects to collect, share, and analyze data. The IoT has become an integral part of our daily lives through applications such as public safety, intelligent tracking in transportation, industrial wireless automation, personal health monitoring, and health care for the aged community. IoT is one of the latest technology that will change our lifestyle in coming years. Experts estimate that as of now, there are 25 billon connected devices, and by 2020 it would reach to 50 billion devices. This tutorial aims to introduce a practical low-cost IoT Platform. The foundations of IoT will be discussed throughout real applications. Challenges and constrains for the future research in IoT will be discussed. In addition, research opportunities and collaboration will be offered for the attendees.
Ahmed Abdelgawad received his M.S. and Ph.D. degree in Computer Engineering from University of Louisiana at Lafayette in 2007 and 2011 and subsequently joined IBM as a Design Aids & Automation Engineering Professional at Semiconductor Research and Development Center. In Fall 2012 he joined Central Michigan University as a Computer Engineering Assistant Professor. His area of expertise is distributed computing for Wireless Sensor Network (WSN), Internet of Things (IoT), Structural Health Monitoring (SHM), data fusion techniques for WSN, low power embedded system, video processing, digital signal processing, Robotics, RFID, Localization, VLSI, and FPGA design. He has published two books and more than 55 articles in related journals and conferences. Dr. Abdelgawad served as a reviewer for several conferences and journals, including IEEE WF-IoT, IEEE ISCAS, IEEE SAS, Springer, Elsevier, IEEE Transactions on VLSI, and IEEE Transactions on I&M. He severed in the technical committees of IEEE ISCAS 2007, IEEE ISCAS 2008, and IEEE ICIP 2009 conferences. He served in the administration committee of IEEE SiPS 2011. Dr. Abdelgawad has been appointed as a Track Chair of the International Conference on Cognitive and Sensor Networks (MIC-CSN 2013). He also served in the organizing committee of ICECS2013 and 2015 IEEE ICECS2015. Dr. Abdelgawad is the publicity chair in North America of the IEEE WF-IoT 2016 conference. He is the finance chair of the IEEE ICASSP 2017. He is the TPC Co– _Chair of IoT International Innovation Conference 2017 (I3C'17), and the TPC Co– _Chair of Global Internet of Things Summit (GIoTS 2017) too. He is currently the IEEE Northeast Michigan section chair and IEEE SPS Internet of Things (IoT) SIG Member. In addition, Dr. Abdelgawad served as a PI and Co-PI for several funded grants from NSF.
A 2.4GHz high-power efficient Doherty power amplifier (PA) is designed and simulated in 0.18μm CMOS technology. Transmission lines of the two stages were implemented using capacitive and inductive elements and all selected inductors are chosen spiral for integration improvement. This power amplifier delivers a maximum output power of 23.4 dBm to the 50Ω load with about 57% efficiency.
Hamidreza Esmaeili Taheri received his B. S and M. S degree in electrical engineering from K. N. Toosi University of Technology, Tehran, Iran, in 2009 and 2012 respectively. From 2012 to 2017, he has been working as a term faculty in the Department of Electronics Engineering at Behbahan Khatam Alanbia University of Technology, Behbahan, Iran. His research interests include Frequency Synthesizers, RF Power Amplifiers and other analog and mixed signal integrated circuits.
Mehdi Ehsanian received his M. S and Ph. D degrees in electrical engineering from Sharif University of Technology, Tehran, Iran, in 1988 and University of Montreal, Quebec, Canada in 1998 respectively. He has more than 12 years of experience in design of analog, mixed signal, and digital ICs in the fields of RF wireless and data link. He has on many occasions taken a design through from initial specification to final mask generation. He has also carried line management and project management responsibilities. In addition, he has 8 years experience in teaching and research in college and university. He is currently working as Assistant Professor in K.N.Toosi University of Technology.
Adnan Hamze, Arts, Sciences & Technology University in Lebanon
Mouine Hamze, National Council for Scientific Research, Lebanon
Mohamed Elmasry, University of Waterloo, Canada
Mohamad Sawan, Polytechnique Montréal, Canada
Ali Hamie, Arts, Sciences & Technology University in Lebanon
Fouad El Haj Hassan, Lebanese University, Lebanon
Abdallah Kassem, Notre Dame University, Lebanon
Fabrice Monteiro, Université de Lorraine, France
Jamal Chrara, Lebanese University, Lebanon
Mohamad Khalil, Lebanese University, Lebanon
Imad El Hajj, American University of Beirut, Lebanon
Amer Baghdadi, Télécom Bretagne, France
Stéphane Azou, École nationale d'ingénieurs de Brest, France
Mohamad Tabaa, École Marocaine des Sciences de l'Ingénieur, Morocco
Mohamad Ayash, Islamic University, Lebanon
Elias Rachid, Saint Joseph University, Lebanon
Adnan Harb, Lebanese International University, Lebanon
Luc Hebrard, University of Strasbourg, France
Yasser Mohanna, Lebanese University, Lebanon
Bashar El Hasan, UL, OEA, Tripoli, Lebanon
David Zein, RDC, Lebanon
Mohamad Diab, RHU, Lebanon
Emmanuel Simeu, University of Grenoble, France
Tilda Akiki, Holy Spirit University of Kaslik, Lebanon
Aziz Barbar, American University of Science and Technology, Lebanon
Abbas Dandache, Université de Lorraine, France
Kamal Nasreddine, École nationale d'ingénieurs de Brest, France
Eric Kerherve, Laboratoire de l'Intégration du Matériau au Système, France
Saleem Hamady, Arts, Sciences & Technology University in Lebanon
Ola Jizaoui, Arts, Sciences & Technology University in Lebanon
Ammar Sharaiha, École nationale d'ingénieurs de Brest, France
Abdoul Rjoub, Jordan University of Science and Technology, Jordan
Khaled Salama, King Abdullah University of Science & Technology, KSA
Mohab Anis, The American University in Cairo, Egypt
Mohamed Masmoudi, National School of Engineers of Sfax, Tunisia
Mountassar Maamoun, Blida University, Algeria
Said Belkouche, Cadi Ayyad University, Morocco
Abbes Amira, Qatar University, Qatar
Falah Awwad, United Arab Emirates University, UAE
Raafat Lababidi, ENSTA, France
Mehdi Ehsanian, KNTU, Iran
Hussein Chible, Lebanese University, Lebanon
Mouenes Fadlallah, Lebanese University, Lebanon
Chafic Salame, Lebanese University, Lebanon
Hamzé Alaeddine, Lebanese University, Lebanon
Mahmoud Mehdi, Lebanese University, Lebanon
Ali Baydoun, Lebanese University, Lebanon
Ali Husseini, Lebanese University, Lebanon
Bilal Said, Arts, Sciences & Technology University in Lebanon
Mohamad Hamze, Arts, Sciences & Technology University in Lebanon
Jihad Itani, Arts, Sciences & Technology University in Lebanon
Bilal Nakhal, Arts, Sciences & Technology University in Lebanon
Mohamad Itani, Arts, Sciences & Technology University in Lebanon
Sawan M, Canada, Coordinator
Abid M, Tunisia
Ait Mohamed O, Canada
Amira A, Qatar
Ammari A, Saudi Arabia
Awwad F, United Arabe Emirates
Bermak A, Qatar
Boukadoum M, Canada
Dandache A, France
Elmasry M, Canada
Ghannouchi F, Canada
Hamie A, Lebanon
Haj Hassan F, Lebanon
Kassem A, Lebanon
Maamoun M, Algeria
Madian A, Egypt
Mahmoud S, United Arabe Emirates
Masmoudi M, Tunisia
Mohammad B, United Arabe Emirates
Salama K, Saudi Arabia
Tabaa M, Morocco
Tahar S, Canada
|Tutorials proposals||Submission deadline||June 15, 2017|
|Notification||June 25, 2017|
|Papers||Full Paper Submission||July 16, 2017
|Notification of Acceptance||September 18, 2017
September 25, 2017
|Camera Ready Submission||October 13, 2017|
Papers accepted for Oral Presentation will be submitted for inclusion in the IEEE Xplore Digital Library.
Authors of Accepted Papers need to submit their Final Manuscripts prior to the deadline of August 1, 2017, using the following steps:
Please note: Uploading a paper to IEEE PDF Express is not the same as submitting the paper to the conference. You will still need to submit the checked PDF by the normal means through the EDAS website (http://edas.info/N23573).
SOME MORE INFORMATION ON PAPER STYLE AND PDF EXPRESS
The page size requirement for ICM2017 is A4 paper. The settings below are required for the final submission.
|Top margin (1st page)||1.0in||2.54cm|
|Top margin (rest)||0.75in||1.9cm|
Procedure for IEEE Xplore-Compatible PDF:
|First-time users:||Previous users, but using it the first time for a new conference:||Returning users:|
|Options (choose one)||If the PDF submitted fails the PDF check:||If you are not satisfied with the IEEE PDF eXpress-converted PDF:|
|Option 1||Submit your source file for conversion by clicking Try again, then Submit Source Files for Conversion||Resubmit your source file with corrections (Try again, then Submit Source Files for Conversion)|
|Option 2||Read the PDF Check report, then click “The PDF Check Report” in the sidebar to get information on possible solutions||Submit a PDF by clicking Try again, then Submit PDF for Checking|
|Option 3||“Request Technical Help” through your account||“Request a Manual Conversion” through your account|
IEEE-ICM 2017 offers three best awards for each category (Oral presentations and Poster presentations).
Recognition for best oral presentations:
First place: 400$ award
Second place: 300$ award
Third place: 200$ award
Recognition for best poster presentations:
First place: 200$ award
Second place: 150$ award
Third place: 100$ award
All three winners from both categories will be granted rank certificates.
(on OR before 18 OCT 2017)
(after 18 OCT 2017)
|Full-Registration (covers 1 paper) IEEE Member||300$||250$||375$||325$|
|Full-Registration (covers 1 paper) Non-IEEE Member||400$||300$||475$||375$|
|Full-Registration (covers 1 paper) IEEE Student Member||250$||225$||325||300$|
|Full-Registration (covers 1 paper) Non-IEEE Student||300$||250$||375$||325$|
|Additional Paper Registration (per paper)||250$||225$||325$||300$|
|Conference Registrations for attendance only
(excluding Lunch and Banquet Dinner)
Additional Optional Items
|Extra USB Proceedings||50$|
|Extra Lunch Ticket||20$|
|Extra Banquet Dinner Ticket||50$|
Payments Instructions1- Online Payment using credit card through EDAS system. All credit card payments are to be made in United States Dollar (USD).
2- Payments by bank transfer:
|Bank Name:||ARAB Bank - Lebanon|
|Branch Name:||Ras Beirut Branch|
|Branch address:||Hamra, Makdissi Street, Sabbah Bldg.|
|Account Name:||Arts, Sciences & Technology University in Lebanon|
|IBAN Number:||LB92 0005 0000 0000 3323 3383 0814|
The ICM 2017 conference will be held at the Crowne Plaza Hotel which is also openned for accommodation.
Individuals are responsible for making their own hotel reservation.
It is advised to make reservations early as hotels fill-up quickly during the holidays season.
Hotel Name: Crowne Plaza Hotel
Address: Hamra Street, Beirut, Lebanon
Phone Number: +961 1 734100
Fax Number: +961 1 749555
E-mail Address: firstname.lastname@example.org
For room reservation use this LINK for special rates
Hotel Name: Napoleon Hotel Beirut
Address: Nehme Yafet - Street Hamra, Beirut, Lebanon
Phone Number: +961 1 340013
Fax Number: +961 1 340279
E-mail Address: email@example.com
Hotel Name: Elysee Residence Beirut
Address: Lebano Abed Al Aziz Street - Hamra, Beirut, Lebanon
Phone Number: +961 1 744850
Fax Number: +961 1 344502
E-mail Address: firstname.lastname@example.org
Hotel Name: Plaza Hotel
Address: Hamra Street - Main road, Beirut, Lebanon
Phone Number: +961 1 755777
Fax Number: +961 1 751255
E-mail Address: email@example.com